Table 1 Comparison of different III–V/Si Integration technologies
III–V/Si Integration technologies | Thermal conductivity | Surface requirement | Substrate material required | Active–passive coupling loss | Assemble cost | Test complexity | |
|---|---|---|---|---|---|---|---|
Hybrid | N/A | N/A | III–V & SOI | 2–8 dB [42] | External laser packaging and coupling | High: die & wafer level | |
Heterogenous | BCB | Low | Low | III–V & SOI | N/A | Low: wafer level | |
Metal | High | Low | |||||
Direct | High | High | |||||
Monolithic | High | High | Silicon | Preliminary result:-7.35 dB [44] Assuming butt-joint regrowth: 0.1–0.5 dB | N/A | Low: wafer level | |